Cadence Allegro PCB Design

Software Solutions

Allegro PCB Design

The Allegro PCB Design flow is the higher performance part of the scalable PCB layout solution from Cadence. It enables users to run signal and power integrity checks and simulations directly in the PCB tool. In an engineering team users can work in parallel for small projects or complex systems on one circuit schematic or a PCB layout together. Direct flawless integration for SI, PI and RF of Cadence simulation tools enable highest accuracy of virtual measurements. Today the most complex electronic designs are made with Allegro PCB Designer.
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Allegro High-Speed

With the High-Speed Option the Constraint Manager is extended by many electrical design rules and their online check in the PCB Editor which are required to design modern high-speed interfaces such as DDR2, DDR3, DDR4, PCI Express and USB 3.0. Auto-interactive commands for delay and phase tuning as well as a color overlays to visualize the tuning simplify the layout of high speed interfaces dramatically. Integrated workflows to evaluate e.g. crosstalk or return path complete the High-Speed Option.
Allegro datasheet

Allegro Miniaturization

Main feature of the Allegro Miniaturization Option is the embedding of components into the PCB. The option takes care about cutting out the required cavity including additional spacing. Checks for component height against layer stackup as well as creation of additional layers for the embedded components are available. Additional important feature of the Miniaturization Option is the handling of design rules for HDI like additional µ-via rules.
Allegro datasheet

Allegro Manufacturing

Allegro Manufacturing Option consist of three tools for easy manufacturing output. Documentation Editor creates complex documentation of production and assembly data automatically. Automation introduces a defined flow of documentation that leads to consistent documentation, avoiding misinterpretations. Update documentation after changes occurred are easy. Special views linked to the Allegro database can also be created. This includes enlarged drawing details, notes and work instructions, etc. A Panel Editor to compose production panels and a DFM Checker to set up manufacturing related checks is included too.
Allegro datasheet

PCB Library Creation

The Library Creator helps your team improve the quality and accuracy of the PCB library. Build 2D footprints and 3D models complete and in sync. Designers can choose from thousands of detailed 3D package models in the provided repository, create new packages from over 100 provided parametric templates, or leverage existing 3D models directly. Use rules to build footprints compliant to public standards like IPC or your own standards.
Allegro ECAD-MCAD Library Creator datasheet

Allegro Analog RF

With increasing frequencies, the copper structures become electrical components due to its characteristic shape. Using the Analog / RF Option these structures can be taken into account. With the Analog / RF Option parameterized layout elements such as transmission lines, filters or couplers can be directly used in the schematic together with normal schematic elements and transferred to the PCB layout. The connectivity can also be edited in the PCB Editor environment. To simulate and optimize the design an interface to Keysight ADS is included.
Allegro datasheet

Allegro Team Design

With Symphony Team Design Option, multiple people can work together on a PCB layout. The module has the possibility to partition the design into different sections and each user gets his own section. The other use model is simultaneous working together in the same design database. This can be done on the fly by simply starting a Symphony server on one machine. Other user can directly login to that session. Alternatively the server can also be started on a network machine. Employees can sit in different locations around the world.
Allegro datasheet

Allegro FPGA System Planner

Pin assignment of FPGAs is not a simple task. The FPGA designer usually begins programming the FPGA much earlier than the circuit diagram or layout is designed. FPGA programming software has no knowledge of the later layout, so freely programmable pins are randomly assigned. Later, when the layouter asks for a pin swap to simplify routing, it's usually too late and the FPGA designer does not want to touch his near-finished code anymore. Before the first line of code is programmed, 3 experts (FPGA, HW design and layout) can sit down and roughly plan the layout and assign the pins optimized by a floorplan. This provides optimal pin assignment.
Allegro datasheet

DFM Portal

Cadence DesignTrue DFM technology helps users of Allegro PCB Editor or OrCAD PCB Editor to validate manufacturability and shorten design cycles. You can check DFM rules in real-time while designing so you can get your design done right the first time.
DFM Portal