CDNLive 2019

Cadence Designer Network Live

The CDNLive 2019 takes place from May 6th to 8th in Unterschleißheim near Munich and offers a lot of interesting lectures, demos etc. about the solutions of Cadence. The lectures will be provided by users, competent industry representatives and application engineers from Cadence and FlowCAD. For the area of ​​PCB we have compiled a section of the agenda.

Tuesday, 7. Mai 2019

Preview of the agenda (only PCB tracks)

The day begins with two keynote presentations for all participants. In the breaks and before the evening event exhibitors show their solutions in the Designer EXPO. During the day a lot of tracks take place in parallel. There are a track in German and English with different contents for topics around the circuit board. The PCB tracks take place in two adjoining rooms, so visitors can change quickly if needed:

German flag German PCB Track (Room Bodensee II):

  • Was ist neu im Schematic Entry und PCB Editor (Teil 1)
  • Was ist neu im Schematic Entry und PCB Editor (Teil 2)
  • System Design
  • Unternehmensweites PCB-Daten-Management
  • Integrierte neue Design-Checks
  • Integrierte Design Analyse
  • Full Wave 3D Simulationen
  • Starrflex (Rigid Flex) Technologie: Grundlagen, Standards, Designregeln
  • Starrflex (Rigid Flex) Technologie Live Demo
  • Embedded Components Technologie: Grundlagen, Standards, Designregeln
  • Embedded Components Technologie: Live Demo

uk flag English PCB Track (Room Bodensee I):

  • Cross-Fabric Design Planning and Optimization, Taking Into Account the Package Routing Strategy (STM)
  • Checking the Connectivity Between Design Fabrics (STM)
  • Virtuoso Platform as a Common Layout Design Environment for Chip / Package / PCB Co-Design (Infineon Technologies)
  • Applying the Allegro PCB Symphony Team Design Flow and DFM Checking Capabilities for IC Package and SiP
  • 25Gbps Simulations with Sigrity 2018 Release (Grass Valley)
  • Electrical / Thermal Co-Simulation of SMPS High Current Density PCB Design (Infineon Technologies)
  • SI / PI / EMC Full System Simulation of Complex Tester PCB Boards (40 Layers) MLO, Contact Unit and IC (NXP Semiconductors)
  • Introducing a 5G Reference Design for Allegro
  • True 3D Extraction and Analysis on Large Geometries
  • What’s New in Signal- und Power Integrity Applications for the SPB 17.4 Release and Beyond

Wednesday, 8. May 2019

Multi-hour workshop to create OrCAD and Allegro libraries with parameterized models

Registration and official agenda

Find more details about this evet and the complete CDNLive agenda and registration on Cadence's website.

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