FlowCAD bietet eine Reihe von nützlichen Tool-Erweiterungen, die die Produktivität steigern. Diese Erweiterungen wurden entwickelt, um die spezifischen Bedürfnisse unserer Kunden zu erfüllen. FlowCAD programmiert gerne zusätzliche Funktionen, um auch Ihre speziellen Anforderungen zu erfüllen.
Die Installation der FloWare Module ist ein einfacher Vorgang und erfordert keine Fachkenntnisse. Der Installationsprozess umfasst einen Assistenten, der durch den FloWare-Installationsprozess führt. Menüstrukturen werden vom PCB Editor automatisch erkannt und in der Symbolleiste angezeigt.
Wählen Sie ganz nach Bedarf aus den verfügbaren Modulen und steigern Sie mit den Zusatzfunktionen die Produktivität beim PCB Design. Die Lizenz wird per E-Mail verteilt und gilt für den Standort Ihres Unternehmensstandortes. Jedes Modul beinhaltet eine ausführliche Dokumentation.
Die Installation der FloWare Module ist sehr einfach und plattformunabhängig. Die Menüstrukturen werden vom PCB Editor automatisch erkannt und in der Menüleiste angezeigt.
FloWare ist eine kostenpflichtige Option. Sie können ein oder mehrere Module auswählen und mit der Free Trial testen. Ohne Lizenz kann FloWare nicht genutzt werden. Die Lizenz wird per E-Mail zugesandt und ist für den Standort Ihres Unternehmens gültig.
Aktuell verfügbare Module in alphabetischer Reihenfolge. Klicken Sie auf die Schaltflächen, um zu den verschiedenen Abschnitten zu navigieren.
Drawing Size allows users to change and modify the drawing extents in a quick and easy way. This is useful if you want to reduce design extents to minimum values. Settings can be applied to all or individual sides of the drawing canvas.
Net Color View allows saving and restoring net color and rat visibility settings. This is very useful for floor planning and route feasibility studies. Temporary colored nets for a special task are easier to identify.
Advanced Mirror is an application that allows users to perform mirror operations while moving or copying a group of selected objects. Mirroring can be performed either across subclasses or on the same subclass (geometry only). When wires and components are mirrored, DRCs will occur because the component pins no longer match the mirrored layout. Many users consider this new connection of the pins to be much easier than rebuilding the complete circuit board. It is often used to mirror keepouts and shapes.
Change Width helps users to change the width of clines and clines segments. In contrast to the standard "Edit - Change" command this module supports a filter mechanism in that the changes are only applied to segments matching a given width. Furthermore highlight and report functionality is available. Users can select by pick, window, temp group or find by name.
Coil Designer creates planar windings in PCB Editor. Generation is controlled with variable parameters. Available are four general shapes: round, rectangular, hexagonal and octagonal. With changes in parameters in the menu the dimensions or number of windings will be dynamically updated in the preview at the cursor. Corners can be mitered or rounded off with a parameterized radius. Within a structure a keep out area can be generated as well with a spacing towards the inner winding. If you want to place a via at the beginning and end of the winding, you can select an available via type. Winding direction can be clockwise or counterclockwise and geometry can be rotated.
YouTube Video Coil Designer
Some users wish to expand the copy function of PCB Editor. Using the command Edit-Copy in Cross Copy, a target layer can be defined. Standard copy command does not support a destination layer and compared to the Z-Copy command, Cross Copy offers way more flexibility.
Positioning of reference labels in the library is normally standardized. After placement or in case of high-density designs, texts can become difficult to read. Manual adjustment of text parameters is then necessary. With Label Tune, label size, rotation, and position can be adjusted so that they are easier to read for Assembly Drawings. Further parameters are mirror and center fit, which incorporate maximum block size and spacing to component boundaries.
YouTube Video Label Tune
In some applications (e.g. medical, automotive) not only the boards have a circular outline also placement and routing has to be done in a circular fashion. Doing these kinds of boards on the basis of a cartesian grid is time consuming and cumbersome. Polar Grid Utilities is a toolkit that is exactly dedicated to this kind of application. Besides the capability to define a polar grid, it offers additional functions such as polar placement, polar routing and polar shapes including voids.
YouTube Video Polar Grid
Push to Grid is a placement application that allows users to highlight off grid symbols including an option to move / push them to the nearest grid point. Furthermore it supports a regular placement mode for standard placement operations.
Replace Via is an application which gives users some more flexibility while replacing via padstacks in the design. The operation can be restricted to a selected area. Vias can be included and excluded through interactive commands taking various filter criteria into account. Additional processing options such as Ignore DRC or Retain Mirror Status are available.
Shield Generator facilitates generation of shape and via pattern for shielding purposes. This includes shield rings along board outline (e.g. for ESD protection) as well as generation of shield boxes for RF circuits which require additional noise reduction. The user can choose between different modes for shield generation and can set parameters for shape and via. Mask generation and cutting capabilities for solder mask and paste mask can also be used.
Some RF applications require shields for critical signals in order to minimize crosstalk and noise. Shields may be realized on same layer like signal trace (side shield) or on adjacent layers above or below the signal trace (tandem shield). In both cases shield structure follows the structure of signal trace and is expanded to a certain extent. Usually shields are realized by dynamic or static shapes connected to a ground net. Route keepouts may be also understood as some sort of shielding as they keep noise away. Shield Routing is an application which enables users to create shields for signal traces inside PCB Editor.
YouTube Video Shield Routing
When you need to manipulate geometric forms you normally can do the operations much easier in a mechanical CAD software compared to OrCAD / Allegro PCB Editor. Drafting Utilities offers some useful functions to edit geometric PCB forms. It is possible to cut through forms and structures and use the separated individual pieces. This helps to create unusual shapes which are not based on a grid but on intersections of other objects. Besides the cutting feature there are some useful drawing features for lines and arcs.
YouTube Video Drafting Utilities
Graphical editing of copper areas, pads or other geometrical forms is sometimes complex and goes beyond standard functions of PCB Editor. With Snap Generator it is possible to generate intersections of objects (I = intersection), center points (C), end points (E), pins (P = origin) or equally long sections (X = section) by selecting the elements. Generated snap points are saved on a separate layer and their coordinates can be combined with normal commands in PCB Editor. In this way, all special points outside the grid can be incorporated reliably and accurately.
Copper shapes have to have sometimes very specific outlines for electrical reasons to enable a circuit board to perform correctly. Shape Utilities can efficiently enhance existing functionality in OrCAD / Allegro PCB Editor. With boolean operations (OR, AND, ANDNOT, XOR) two shapes can be calculated against each other to a new shape. Original shape attributes (shape type, fill style, net name, ...) of primary shape will remain attached to the resulting shape. Any shape can also be scaled with size operators (Expand / Contract). A separate parameter will specify the handling of voids. Shapes with corners can be rounded off.
YouTube Video Shape Utilities
In order to optimally fulfill contacting requirements for In-circuit tests (ICT) various test probes are available. These differ in terms of height, size, tip style and type of connection. On the PCB the corresponding contact areas (testpoints) must reflect these requirements. Advanced Testpoint Check addresses various rules for testpoint checking.
Helps users to check AOI related rules directly in PCB Editor. Shadowing can cause serious issues in verfication process. Shadows can be calculated in various directions based on specified camera angles (all, horizontal, vertical, 45 degrees) taking component height into account. Special rules apply to 3D inspection systems.
CAF (Conductive Anodic Filament) describes the chemical effect of copper ion migration in the FR-4 base material at high voltages, which causes breakdowns in PCBs. CAF-DRC makes it possible to execute a special design Rule Check in PCB Editor for OrCAD and Allegro. Corresponding minimum distances between the bore outer diameter and next conductive material are specified as a function of voltage classes. If distance is undercut, a DRC error occurs.
Cleanliness Check analyzes the PCB layout for contact areas caused by particles with a given size. Contact area specifies the area in which a particle will cause a short, no matter how the particle is oriented. Cleanliness Check calculates and visualizes contact areas using shapes and writes a report. By sweeping the particle size the information from the output can be used to feed cleanliness assessment calculator from ZVEI.
This app compares two design databases and recognizes the differences. In this way deviations in product life cycle can be detected and documented. Design Compare distinguishes designs in two different types of comparison. In standard comparison, parameters in the design that exist as numbers or texts (e.g. net names, properties) in the database are compared. In addition, a graphical comparison of the geometry of the layout is possible. Results can be output as an HTML report.
When routing FGPAs on a circuit board, it is often necessary to swap individual pins (pin swap) to optimize routing. These changes must be saved in FPGA environment so that the FPGA designer can synchronize his data. FPGA Utilities generates various reports for this purpose (e.g. Show Difference). Pin Constraints in manufacturer-specific formats (MicroSemi / Actel, Xilinx, Altera, Lattice or Excel / CSV) can also be generated. FPGA Utilities enables the user to synchronize FPGA and PCB design data quickly and efficiently.
DRCs in PCB Editor work only in x and y direction. Z-DRC checks can be made respective the z-coordinates. This might be useful for safety or explosive requirements. The user can select between which layers the check shall be performed. As a result a list of Z-DRCs will be displayed. By clicking on each Z-DRC PCB Editor will zoom in on the area, where the error was found. DRCs can be stored as external DRCs in the database.
To identify PCBs some customers print barcodes on a PCB layer as part of the manufacturing process. With Barcode Generator you can easily enter the value and create the barcode of that value. Barcode is placed onto any layer of the design. This app supports symbol definitions for Code 39, Code 128, QR Code and DataMatrix with adjustable parameters for barcode height, width, single bar width and margins. You have the choice, if you want to show the text under the bars or choose an inverted display. For easy dimensioning you have a dynamic preview during parameter change.
YouTube Video Barcode Generator
For documentation purpose cross section (PCB stack up) needs to be documented. Cross Section Generator creates a documentation view of cross section which is stored in PCB Editor database. Appearance is customized for the content, which might include: layer name, layer thickness (including total thickness), layer material, via stack and via labels. Various graphical options can be set up like symbol size (extra row column spacing), fill styles for conductor and dielectrica, scaling of layer thickness for better readability. Configuration of the appearance is stored in the database and an updated plot will be generated without entering all settings.
YouTube Video Cross Section Generator
In PCB Editor the user can define his own variables to be used in title block or as etch text. Variables are automatically updated across all subclasses and a placeholder can reference to more than one variable. Placeholder attributes (x, y, block, rotation) are stored in the database. Values for variables can be entered manually, sourced from an external control file or even a cpm-file. Special fields are available for inserting Auto_Date, Auto_User, and others.
Manufacturing departments often need a zoomed area of a PCB for a detailed view of a special area. In PCB Editor you can create such a drawing detail. Drawing Designer offers more functionality. Details can be created on an additional documentation layer with a defined zoom factor and are always in synchronization with electrical layers of the base design. Created details can be rotated or mirrored on documentations layers and synchronization is done automatically. Settings are stored in design database and are available when the design was opened. Settings can also be exported for usage in other designs.
When releasing a PCB design for production, additional documentation is required for manufacturing, assembly or testing. Drawing View Manager facilitates the creation of manufacturing drawings. Scale factor or mirrored geometry, rotation and other parameters can be specified. Changes to the master PCB can be applied with a single click. User-defined templates simplify the work.
YouTube Video Drawing View Manager
Padstack Usage allows users to generate padstack reports by extracting data from PCB Editor symbol libraries (*.dra). Different reports output formatted text, MS Open XML, and HTML. Report "Where-Used" lists all footprints that use a given padstack. Report "Padstack Standard" lists the padstack definitions for a given footprint and "Padstack Detailed" lists detailed information for a given footprint. This information includes number of pins, vias and mechanical pins, pin numbers, xy coordinates etc.
During development electrical engineers would like to see which PCB footprints are available in the company’s library. PCB Library Plot process a complete library and create a PDF document with a graphical representation of all available footprints. Graphics will be scaled to fit into a selected template (i.e. 4-up, 6-up, 8-up). In addition to the footprint attributes are added into each field, like footprint name, dimensions (place bound, visible), height, pitch, used pad stacks, pin count, mechanical pin count, etc. Which attributes are printed is customized. The add-on can run through different libraries.
YouTube Video PCB Library Plot
SVG Export allows users to generate SVG data out of PCB Editor. Users can export SVG from current drawing, and for a complete footprint library (including HTM report generation). Content and styles can be specified by using predefined profiles. SVG is a vector file format for pictures, which is small in size and displays well on screens, and print as sharp image.
Variant Assembly gives users more flexibility when creating variant assembly views. Production of variant views in one step is automated. Label content is customized (RefDes, Value, Part Number). Outline is also customized to assembly, place boundary, silk screen, or any other outline from data base. Different styles for DNI (do not install) components are provided: remove all components, draw a thick cross through the label and many more styles. Alternate symbols can be indicated with a modified label with prefix or suffix or different component outline line style or hatched filling. In the output a automatic mirror for bottom side can be placed.
YouTube Video Variant Assembly
In order to automate production data output (Gerber data, drill plans, …) it is advisable to create a defined document batch. Batch Plot supports this function. The user can create a whole batch of data in one step as a PDF file. You write the data using a PDF print driver (e.g. Adobe Acrobat) in one or more multi-page documents. The order of the pages in the data batch can be defined by the user. The settings for complete document batches for production, assembly and tests are saved.
Edge plating and castellation used metallization at the sides of a PCB. It is used for EMI-shielding, thermal heat distribution as part of a cooling solution, better current distribution for power electronics, mechanical protection when the PCB slides in a ground connector or to solder a PCB directly on top of another PCB without a connector. The app supports two modes of operation, wraparound edge plating and castellated holes. Plating sections can be defined interactively. Net assignment, Connectivity Check, DRC Clearance Check and Net Short support are offered.
This toolset supports various techniques for PCBs in a panel to be easily separated after they are manufactured and assembled. It is possible to add mill contour, split and cut mill and to add mill tabs with or without perforation drills. The app provides libraries from different PCB fabricators. V-Score lines can be defined in horizontal or vertical directions by selecting an appropriate side of the board. V-Score fabrication details can be specified which creates an IPC-2581 Spec Definition entry in the database.
PCBs are manufactured often in fabrications panels. If placement is not done by external manufacturing company, the PCB designer can use Panelization to do it himself. Just open a new blank project in PCB Editor and place a manufacturing frame and fiducials. Now you can place routed designs multiple times in the panel. Design data will be linked with x and y coordinates and rotation information. While placing a design on the panel you can see the dimensions as a preview. Multiple placements of the design will automatically add a defined prefix to each instance of the design to avoid naming conflicts (duplicates).
YouTube Video Panelization
If a company always orders their PCBs from the same manufacturer, required manufacturing data is also always the same. Post Processing offers a feature set to generate the output in always the same way in OrCAD / Allegro PCB Editor. Generate sets of output data of existing reports in always the same order. Before you can run scripts or other SKILL (FloWare) routines to define parameter settings. Configuration will be saved in the database and the output job can be created with exactly the same settings. Define different output jobs and start them individually. Created files can follow a naming convention.
If PCBs are densely populated, it may happen that there are vias or other elements under the silkscreen that should not be overprinted. DRC design rules can be defined with Silkscreen app. Based on these rules, the app analyzes PCB design and outputs corresponding errors according to the design rule check. The designer can decide if and how these bugs are eliminated. The app deletes according to the settings specifically silkscreen at the desired locations.
Synchronize Testprep can help in OrCAD / Allegro PCB Editor to assign a test point when using dummy test symbols (1-pin part with RefDes TP*) in the schematic. This app will generate from the schematic a corresponding test point in the PCB layout data base. Afterwards all PCB Editor post processing routines for test points (Testprep) can be used as usual. The menu offers various parameters to create a drawing detail. You can select target layer, rotation, scale factor, and mirror. Pads can be filled or left unfilled and shapes can be displayed as they were defined in the design, unfilled, or hatched.
This add-on creates various BOM (Bill of Material) reports from PCB Editor database taking existing variant information into account. It can generate a pick and place report for each variant or the core design. Content is customized for any database attribute. Header information can be added as well as selecting the number of columns and their order. All settings will be stored to easy regenerate the report after design modifications. Report can be generated in ASCII, HTML or CSV.
While designing and simulating a new PCB, there are situations where simulation models from component vendors are not available yet. For this reason users may want to start with a linear model first with a given voltage swing and an adjustable internal resistance based on information from datasheet. Creating an IBIS model from scratch using a text editor is time consuming and error prone. IBIS Prototype Modeler allows users to create linear IBIS models on the fly for early stage simulation purposes in Sigxp. It offers all important features like create Push / Pull, Open-Sink and Open-Source buffers, adjustable voltage levels, etc.
YouTube Video IBIS Modeler
While working on a PCB layout in OrCAD / Allegro PCB Editor it happens, that you place a via with no connection to a net. There are several reasons for this, maybe you want to use the via as a testpoint and placement is predefined by already existing test adapter or you have other reasons for the placement driven from the mechanical design. With Assign Net to Via you can assign easily any net to the stand alone via. If you now start routing from the via, it already has net information and will respect assigned constraints.
YouTube Video Coil Designer
With Class Color you can colorize different nets. This is helpful, when you have high voltages on the PCB and you have to ensure a certain net spacing between several net classes for isolation. When coloring each voltage range in one color, you can visually review your design rules and identify missing or wrong design rule settings. This feature helps you when reviewing a design or need to document spacing classes.
With this app you can assign a color to each unconnected pin. In a report you can see all unconnected pins and walk them through one by one. Cross probing from the report will zoom in the pin in the design. This is useful for reviews of a design and you need to verify each unconnected pin, if it was unconnected intentionally or unintentional.
YouTube Video Highlight Dummy Pins
If you change your supplier for PCB fabrication, it might be necessary to change your masks sets. Mask Generator offers additional features in OrCAD / Allegro PCB Editor to change mask data (expand / contract) in a post process (i.e. solder mask and paste mask). Modified data will be stored on an additional documentation layer, so the base design stays unchanged.
YouTube Video Mask Generator
With Padstack Finder you can search in OrCAD / Allegro PCB Editor in the current design for pad stacks and highlight them. It is differentiated, if the pad stack is a pin or a via. Highlighted results are also available in a report and can be zoomed in by cross probing from the report. Different colors can be assigned to groups for highlighting. Available filters are pad stack name and drill diameter.
Quick Symbol Edit was developed for users who want to speed up librarian work flow. There are three typical use cases. First there is a possibility to change a symbol in the same session, which is similar to Modify Design Padstack handling. Second methodology is to open a new session with a pre loaded Symbol.dra file. And finally you have the choice to export the symbol as .dra, .psm, .pad etc. in a specified directory. The file opening and closing will be handled automatically by the app.